发明名称 |
SEMICONDUCTOR DEVICE HAVING DUTY-CYCLE CORRECTION CIRCUIT |
摘要 |
Disclosed herein is a semiconductor device that includes: an input node; an output node; a plurality of variable delay circuits connected in series between the input node and the output node; a control circuit that commonly controls delay amounts of the variable delay circuits based on phases of a first clock signal supplied to the input node and a second clock signal output from the output node; and a mixer circuit that generates a third clock signal based on any one of input clock signals respectively input to the variable delay circuits and any one of output clock signals respectively output from the variable delay circuits.
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申请公布号 |
US2013207701(A1) |
申请公布日期 |
2013.08.15 |
申请号 |
US201313761137 |
申请日期 |
2013.02.06 |
申请人 |
C/O ELPIDA MEMORY, INC.;C/O ELPIDA MEMORY, INC. |
发明人 |
KITAGAWA KATSUHIRO |
分类号 |
H03K5/06 |
主分类号 |
H03K5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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