Techniques for electromigration stress determination in interconnects of an integrated circuit

摘要

A technique for determining stress in interconnects of an integrated circuit design includes generating a maximal spanning tree of a directed graph. The directed graph represents an interconnect of an integrated circuit design. The technique also includes locating a first point on the spanning tree that has a lowest stress and a second point on the spanning tree that has a highest stress. The technique further includes determining whether a maximum first stress between the first and second points is less than a critical stress.