发明名称 |
Method and structure for self aligned contact for integrated circuits |
摘要 |
A high voltage integrated circuit device includes a semiconductor substrate having a surface region with a contact region, which is coupled to a source/drain region. The device has a plasma enhanced oxide overlying the surface region, a stop layer overlying the plasma enhanced oxide, and a contact opening through a portion of the stop layer and through a portion of the plasma enhanced oxide layer. The contact opening exposes a portion of the contact region without damaging it. The device has a silicide layer overlying the contact region to form a silicided contact region and an interlayer dielectric overlying the silicided contact region to fill the contact opening and provide a thickness of material overlying the stop layer. An opening in the interlayer dielectric layer is formed through a portion of the thickness to expose a portion of the silicided contact region and expose a portion of the stop layer.
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申请公布号 |
US8507378(B2) |
申请公布日期 |
2013.08.13 |
申请号 |
US20100848068 |
申请日期 |
2010.07.30 |
申请人 |
LIU CHIKANG;WEI ZHENGYING;ZHAO GUOXU;LI YANGFENG;ZHU GUOLIANG;YANG FANGYU;SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION;SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION |
发明人 |
LIU CHIKANG;WEI ZHENGYING;ZHAO GUOXU;LI YANGFENG;ZHU GUOLIANG;YANG FANGYU |
分类号 |
H01L29/772;H01L21/768 |
主分类号 |
H01L29/772 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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