发明名称 Ultra low power sleep mode
摘要 An integrated circuit in accordance with one embodiment of the invention can include a plurality of storage elements that can be coupled in a first mode and a second mode. The first mode includes the plurality of storage elements being coupled to enable normal operation of the integrated circuit, and the second mode includes the plurality of storage elements being coupled together as a shift register. The integrated circuit also includes a rewritable non-volatile memory and a sleep controller that is coupled to the rewritable non-volatile memory. The sleep controller is for switching the plurality of storage elements between the first mode and the second mode. The sleep controller is for extracting data from the plurality of storage elements in the second mode and storing the data with the non-volatile memory to record the operating state of the plurality of storage elements in the first mode.
申请公布号 US8510584(B1) 申请公布日期 2013.08.13
申请号 US201113296977 申请日期 2011.11.15
申请人 WRIGHT DAVID G.;LUCIANO PROCESSING L.L.C. 发明人 WRIGHT DAVID G.
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
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