发明名称 |
FORWARD PROGRESS MECHANISM FOR STORES IN THE PRESENCE OF LOAD CONTENTION IN A SYSTEM FAVORING LOADS BY STATE ALTERATION |
摘要 |
A multiprocessor data processing system includes a plurality of cache memories including a cache memory. The cache memory issues a read-type operation for a target cache line. While waiting for receipt of the target cache line, the cache memory monitors to detect a competing store-type operation for the target cache line. In response to receiving the target cache line, the cache memory installs the target cache line in the cache memory, and sets a coherency state of the target cache line installed in the cache memory based on whether the competing store-type operation is detected.
|
申请公布号 |
US2013205096(A1) |
申请公布日期 |
2013.08.08 |
申请号 |
US201213679351 |
申请日期 |
2012.11.16 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GUTHRIE GUY L.;LE HIEN M.;SHEN HUGH;STUECHELI JEFF A.;WILLIAMS DEREK E. |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|