| 摘要 |
<p>A computational processing unit (11) controls a frequency control unit (13) and a DC-AC conversion circuit (6) so as to repeat: a period (A) in which, after the lapse of a period (a1) in which the current is maintained at one polarity, there is continued for at least two cycles maintenance of the current with inverse polarity to the aforesaid polarity for a period (a2) that is shorter than the length of the period (a1); and a period (B), which is at least the period (a1), in which the polarity is maintained constant. Also, the computation processing unit (11) controls a PWM control unit (12) and a voltage step-down circuit (5) so that, after maintaining the current absolute value at a first current value during the period (A), the absolute value of the current is maintained at a second current value larger than the first current value during the period (B).</p> |
