IMAGE PROCESSOR FOR EXTRACTING FEATURES

摘要

The present invention relates to an image processor for extracting features. The processor comprises a single non-planar chip containing a plurality of integrated sensors and processing resources distributed in two or more layers and configured to capture image frames and extract features of the images. In one particular embodiment, the non-planar chip is a CMOS 3D integrated circuit (CMOS 3D IC) with a vertical distribution of the sensing and processing resources distributed in two or more vertical layers of the integrated circuit. The CMOS 3D IC uses two or more feature detectors in a single chip, reusing a plurality of circuits used to obtain the gradient and key points. The feature detectors include a scale invariant feature transform (SIFT) detector, a Harris detector and a detector based on the Hessian matrix.