| 摘要 |
Described embodiments recover timing and data information from a signal received via a communication channel. An analog-to-digital converter (ADC) operating at a baud rate of the communication channel generates an actual ADC value corresponding to each bit sample of the received signal. A fast symbol estimation module estimates, based on the actual ADC value, a bit value corresponding to each bit sample. The fast symbol estimation module operates at a digital clock rate. The estimated bit values are provided to a timing recovery module. An ADC reconstruction module, based on a first number of pre-cursor estimated bit values, an estimated cursor bit value, and a second number of post-cursor estimated bit values, generates a reconstructed ADC value corresponding to each bit sample. Based on the reconstructed ADC values, the estimated bit values, and the actual ADC values, a corrected bit value is generated for each bit sample.
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