发明名称 MEMORY ACCESS CONTROL DEVICE, MULTI-CORE PROCESSOR SYSTEM, MEMORY ACCESS CONTROL METHOD, AND MEMORY ACCESS CONTROL PROGRAM
摘要 In a memory access controller (202), a classifying unit (302) classifies a CPU (#0) to CPU (#3) into a first group of CPUs having made an exclusive access request to a shared memory (201) and a group of CPUs not having an exclusive access request. Subsequently, in the memory access controller (202), a detecting unit (303) detects a CPU having completed exclusive access among the first group of CPUs, and a notifying unit (304) sends to a core standing by for exclusive access among the first group of CPUs, a notification of release from a state of standby.
申请公布号 EP2581832(A4) 申请公布日期 2013.08.07
申请号 EP20100852867 申请日期 2010.06.08
申请人 FUJITSU LIMITED 发明人 SUZUKI, TAKAHISA;YAMASHITA, KOICHIRO;YAMAUCHI, HIROMASA;KURIHARA, KOJI;WATANABE, KENSUKE
分类号 G06F12/00;G06F9/52 主分类号 G06F12/00
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