发明名称 Modular array defined by standard cell logic
摘要 Disclosed herein is an ASIC having a base array of function blocks. Each function block includes a plurality of primitive cells. Each primitive cell is defined by a component from a standard cell library. The base array is prefabricated for use later with a custom circuit design.
申请公布号 US8504950(B2) 申请公布日期 2013.08.06
申请号 US20100842670 申请日期 2010.07.23
申请人 DELLINGER ERIC;OTRSOTECH, LIMITED LIABILITY COMPANY 发明人 DELLINGER ERIC
分类号 G06F17/50;G06F7/38;H01L;H01L25/00;H01L27/02;H01L27/118;H03K19/00 主分类号 G06F17/50
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