发明名称 Semiconductor process and semiconductor structure for memory array with buried digit lines (BDL)
摘要 A semiconductor process for a memory array with buried digit lines is described. A first trench is formed in a semiconductor substrate. A liner layer is formed on the sidewall of the first trench. A second trench is formed in the substrate under the first trench. A mask layer is formed at the bottom of the second trench. An isotropic doping process is performed using the liner layer and the mask layer as a mask to form a digit-side junction only in the substrate at the sidewall of the second trench.
申请公布号 US8502294(B1) 申请公布日期 2013.08.06
申请号 US201213471464 申请日期 2012.05.15
申请人 SURTHI SHYAM;HEINECK LARS;NANYA TECHNOLOGY CORPORATION 发明人 SURTHI SHYAM;HEINECK LARS
分类号 H01L27/108 主分类号 H01L27/108
代理机构 代理人
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