| 摘要 |
According to some embodiments, an analog radio receiver circuit is configured alternatively in a full-power mode when the receiver is situated in a cradle and connected to an external power source, and in a power-saving mode when the receiver is not connected to the external power source. In the power-saving mode, a scaled-down power level is supplied to an analog radio signal processing circuit component such as an amplifier, filter, oscillator, or mixer. Scaling down the power supplied to analog circuit components allows reducing their power consumption, at the expense of degraded circuit performance (e.g. increased non-linearity and intermodulation, decreased filter selectivity). Switching between full-power and power-saving modes may be achieved by controlling the connection of internal nodes of the signal processing circuit to a power source, and/or inserting circuit components (e.g. resistors, active devices, filter poles) into the signal processing circuit.
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