发明名称 |
Storing dynamically sized buffers within a cache |
摘要 |
A system and method for buffering intermediate data in a processing pipeline architecture stores the intermediate data in a shared cache that is coupled between one or more pipeline processing units and an external memory. The shared cache provides storage that is used by multiple pipeline processing units. The storage capacity of the shared cache is dynamically allocated to the different pipeline processing units as needed, to avoid stalling the upstream units, thereby improving overall system throughput.
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申请公布号 |
US8504773(B1) |
申请公布日期 |
2013.08.06 |
申请号 |
US20080326764 |
申请日期 |
2008.12.02 |
申请人 |
GLASCO DAVID B.;HOLMQVIST PETER B.;LYNCH GEORGE R.;MARCHAND PATRICK R.;ROBERTS JAMES;NVIDIA CORPORATION |
发明人 |
GLASCO DAVID B.;HOLMQVIST PETER B.;LYNCH GEORGE R.;MARCHAND PATRICK R.;ROBERTS JAMES |
分类号 |
G06F12/00;G06F9/46;G06F13/00;G06F13/28 |
主分类号 |
G06F12/00 |
代理机构 |
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