发明名称 Wirebondless wafer level package with plated bumps and interconnects
摘要 A semiconductor package includes a carrier strip having a die cavity and bump cavities. A semiconductor die is mounted in the die cavity of the carrier strip. In one embodiment, the semiconductor die is mounted using a die attach adhesive. In one embodiment, a top surface of the first semiconductor die is approximately coplanar with a top surface of the carrier strip proximate to the die cavity. A metal layer is disposed over the carrier strip to form a package bump and a plated interconnect between the package bump and a contact pad of the first semiconductor die. An underfill material is disposed in the die cavity between the first semiconductor die and a surface of the die cavity. A passivation layer is disposed over the first semiconductor die and exposes a contact pad of the first semiconductor die. An encapsulant is disposed over the carrier strip.
申请公布号 US8502376(B2) 申请公布日期 2013.08.06
申请号 US201113101657 申请日期 2011.05.05
申请人 CAMACHO ZIGMUND R.;MERILO DIOSCORO A.;TAY LIONEL CHIEN HUI;CAPARAS JOSE A.;STATS CHIPPAC, LTD. 发明人 CAMACHO ZIGMUND R.;MERILO DIOSCORO A.;TAY LIONEL CHIEN HUI;CAPARAS JOSE A.
分类号 H01L23/498 主分类号 H01L23/498
代理机构 代理人
主权项
地址