发明名称 MEMORY DEVICE AND TEST METHOD FOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a memory device allowing a person to perform a test by a simple configuration, and a test method for the memory device.SOLUTION: A memory device 100 includes: a main decoder 12 that selects a plurality of word lines disposed in a memory cell array 110; and a plurality of decoder latches 1 connected to the plurality of word lines 21 and are connected in series. Each of the plurality of decoder latches 1 has: an F/F (Flip-Flop) 101 that latches one of a first signal level of a word line connected to the decoder latch 1 in the plurality of word lines 21, and a second level which a previous-step decoder latch 1 outputs; and a first delay part 105 that supplies a delay signal of an input clock signal to a clock terminal of the flip-flop.
申请公布号 JP2013149332(A) 申请公布日期 2013.08.01
申请号 JP20120010995 申请日期 2012.01.23
申请人 RENESAS ELECTRONICS CORP 发明人 OKU SATORU
分类号 G11C29/12 主分类号 G11C29/12
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