发明名称 |
SINGLE-ENDED SRAM WITH CROSS-POINT DATA-AWARE WRITE OPERATION |
摘要 |
A single-ended SRAM including at least one memory cell and a third switch is provided. The memory cell includes a data-latching unit, a first switch, a second switch and a data-transferring unit. The data-latching unit is configured for latching the received input data and provides a storage data and the inverse data of the storage data. The first switch transfers a reference data to the data-latching unit according to a first word-line signal. The second switch transfers the reference data to the data-latching unit according to a second word-line signal. The data-transferring unit decides whether or not to transfer the reference data to the bit-line according to the storage data and a control signal. The third switch receives the reference data and the control signal and transfers the reference data to the first switch, the second switch and the data-transferring unit according to the control signal.
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申请公布号 |
US2013194861(A1) |
申请公布日期 |
2013.08.01 |
申请号 |
US201213562330 |
申请日期 |
2012.07.31 |
申请人 |
JOU SHYH-JYE;LIN JHIH-YU;CHUANG CHING-TE;TU MING-HSIEN;CHIU YI-WEI;NATIONAL CHIAO TUNG UNIVERSITY |
发明人 |
JOU SHYH-JYE;LIN JHIH-YU;CHUANG CHING-TE;TU MING-HSIEN;CHIU YI-WEI |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
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代理人 |
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主权项 |
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