发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device capable of suppressing current consumption and permitting reduction in circuit scale in a latency counter circuit which counts latency by using a high-speed external clock.SOLUTION: The semiconductor device according to the present invention comprises: a clock generation circuit which frequency-divides an external clock into individual divided frequencies and generates individual frequency division clocks CLK 1 and CLK 2 having individual divided frequencies; and a latency counter circuit including multi-staged shift registers (20 to 24) that sequentially shift an input command signal CMDin to output an output command signal CMDout including latency. The latency counter circuit selectively supplies the frequency division clocks CLK 1 and CLK 2 to each stages of the shift registers (20 to 24) on the basis of setting information of the latency, controls operation timing of each stage individually, and selectively outputs one of output signals SC0, SC1 and SC2 from respective stages of the shift registers (20 to 24) as output command signal CMDout.
申请公布号 JP2013149310(A) 申请公布日期 2013.08.01
申请号 JP20120008277 申请日期 2012.01.18
申请人 ELPIDA MEMORY INC 发明人 KINOSHITA HIROTO
分类号 G11C11/4076;G11C11/407 主分类号 G11C11/4076
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