发明名称 Enhanced data partial-erase for multi-level cell (MLC) memory using moving baseline data encoding.
摘要 A method and apparatus are provided for implementing enhanced data partial erase for multi-level cell (MLC) memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase for data written to the MLC memory using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding is performed, and a data re-write after the partial erase to the MLC memory is performed using threshold-voltage-drift or resistance-drift tolerant moving baseline memory data encoding. A data partial erase cycle includes a duration and voltage level based upon the degradation of the MLC memory cells. The method may include reading the memory cells before performing the data re-write. The data re-write may include performing a data pre-write using a new voltage baseline before performing the data re-write. Degradation of the cells may be identified using stored parameter data. The invention includes apparatus 100 for implementing a partial erase and data write for a multi-level cell (MLC) including a controller 106, a moving baseline memory data encoding controller 112, and memory MLC devices 114 which may be Phase Change Memory (PCM) devices or Multi-level (MLC) NAND Flash memory devices 114.
申请公布号 GB2498874(A) 申请公布日期 2013.07.31
申请号 GB20130001473 申请日期 2013.01.28
申请人 HGST NETHERLANDS B.V. 发明人 ZVONIMIR Z BANDIC;LUIZ M FRANCA-NETO;CYRIL GUYOT;ROBERT EUGENIU MATEESCU
分类号 G11C11/56;G06F12/02;G11C13/00;G11C16/04;G11C16/16;H03M5/14 主分类号 G11C11/56
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