发明名称 |
METHODS OF FORMING NANOSCALE FLOATING GATE |
摘要 |
A memory cell is provided including a tunnel dielectric layer overlying a semiconductor substrate. The memory cell also includes a floating gate having a first portion overlying the tunnel dielectric layer and a second portion in the form of a nanorod extending from the first portion. In addition, a control gate layer is separated from the floating gate by an intergate dielectric layer.
|
申请公布号 |
US2013187215(A1) |
申请公布日期 |
2013.07.25 |
申请号 |
US201313795927 |
申请日期 |
2013.03.12 |
申请人 |
MICRON TECHNOLOGY, INC.;MICRON TECHNOLOGY, INC. |
发明人 |
SANDHU GURTEJ S.;RAMASWAMY D.V. NIRMAL |
分类号 |
H01L29/788 |
主分类号 |
H01L29/788 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|