发明名称 ANALOG INPUT AND OUTPUT MODULE
摘要 Provided is an analog input and output module, the module comprising a first signal processing unit configured to separate analog signal inputted from a plurality of HART transmitters from first HART data, convert the analog signal to digital data, transmit the first HART data to a second signal processing unit, and transmit second HART data received from the second signal processing unit to at least one of the plurality of HART transmitters; and the second signal processing unit configured to control the first signal processing unit and storing conversion result.
申请公布号 US2013188752(A1) 申请公布日期 2013.07.25
申请号 US201313745398 申请日期 2013.01.18
申请人 LSIS CO., LTD.;LSIS CO., LTD. 发明人 SIN YONGGAK
分类号 H04L27/00 主分类号 H04L27/00
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