发明名称 STAGED VIA FORMATION FROM BOTH SIDES OF CHIP
摘要 A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.
申请公布号 EP2617054(A2) 申请公布日期 2013.07.24
申请号 EP20110767505 申请日期 2011.09.14
申请人 TESSERA, INC. 发明人 OGANESIAN, VAGE;HABA, BELGACEM;MOHAMMED, ILYAS;MITCHELL, CRAIG;SAVALIA, PIYUSH
分类号 H01L21/768;H01L23/48;H01L25/065 主分类号 H01L21/768
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