发明名称 Metal-contamination-free through-substrate via structure
摘要 A through-substrate via (TSV) structure that is immune to metal contamination due to a backside planarization process is provided. After forming a through-substrate via (TSV) trench, a diffusion barrier liner is conformally deposited on the sidewalls of the TSV trench. A dielectric liner is formed by depositing a dielectric material on vertical portions of the diffusion barrier liner. A metallic conductive via structure is formed by subsequently filling the TSV trench. Horizontal portions of the diffusion barrier liner are removed. The diffusion barrier liner protects the semiconductor material of the substrate during the backside planarization by blocking residual metallic material originating from the metallic conductive via structure from entering into the semiconductor material of the substrate, thereby protecting the semiconductor devices within the substrate from metallic contamination.
申请公布号 US8492878(B2) 申请公布日期 2013.07.23
申请号 US20100840688 申请日期 2010.07.21
申请人 FAROOQ MUKTA G.;HANNON ROBERT;VOLANT RICHARD P.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FAROOQ MUKTA G.;HANNON ROBERT;VOLANT RICHARD P.
分类号 H01L29/40 主分类号 H01L29/40
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