发明名称 COMPARISON CIRCUIT AND A/D CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a comparison circuit capable of power-saving high speed operation which permits an offset to be adjusted to zero or a threshold to be set to an arbitrary level.SOLUTION: The comparison circuit includes: a differential amplification circuit operatively switched in response to a clock signal CLK to output a first intermediate output DP and a second intermediate output DN corresponding to a first input signal VIP and a second input signal VIN; and a differential latch circuit operatively switched in response to the clock signal to make a state change depending on the first intermediate output and the second intermediate output, and having controllable sensitivity of the state change to the first intermediate output and the second intermediate output.
申请公布号 JP2013143626(A) 申请公布日期 2013.07.22
申请号 JP20120002138 申请日期 2012.01.10
申请人 FUJITSU LTD 发明人 DANJO TAKUMI
分类号 H03K5/08;H03M1/36 主分类号 H03K5/08
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