| 发明名称 |
METHOD AND APPARATUS TO SERIALIZE PARALLEL DATA INPUT VALUES |
| 摘要 |
A method includes applying a clock signal having an uneven duty cycle to a control input of at least one selection element of a selection circuit having a tree structure that includes multiple selection elements. The tree structure includes a data input tier and a data output tier.
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| 申请公布号 |
US2013181742(A1) |
申请公布日期 |
2013.07.18 |
| 申请号 |
US201313785174 |
申请日期 |
2013.03.05 |
| 申请人 |
QUALCOMM INCORPORATED;QUALCOMM INCORPORATED |
发明人 |
LEE CHULKYU;DANG HARRY H.;DIXIT ABHAY S. |
| 分类号 |
H03K19/096;G06F17/50;H03K19/20 |
主分类号 |
H03K19/096 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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