| 摘要 |
An integrated circuit including a first level shifter configured to receive a first input signal and a first power supply signal, and to output a first output signal. The integrated circuit further includes a first inverter configured to receive the first output signal, and to output a first inverter signal. The integrated circuit further includes a second level shifter configured to receive a second input signal and a second power supply signal, and to output a second output signal, wherein a voltage level of the second power supply signal is different from a voltage level of the first power supply signal. The integrated circuit further includes a second inverter configure to receive the second output signal, and to output a second inverter signal. The integrated circuit further includes an output buffer configured to receive the first inverter signal and the second inverter signal, and to output a buffer output signal.
|
