发明名称 Analog-digital converting apparatus and clock signal output apparatus
摘要 An apparatus includes a voltage controlled oscillator for outputting a clock signal having an oscillation frequency in accordance with an input voltage; a convertor for converting the analog video signal inputted from the exterior into the digital video signal synchronizing with the clock signal outputted from the voltage controlled oscillator; a phase difference detector for detecting a phase difference between the composite synchronizing signal in the analog video signal and a feedback signal which corresponds to the clock signal from the voltage-controlled oscillator; and a voltage control unit for controlling the input voltage of the voltage controlled oscillator to change in response to the phase difference detected by the phase difference detector when the phase difference is within the certain range, and to maintain the input voltage intact when the phase difference is in exceed of the certain range.
申请公布号 US8488062(B2) 申请公布日期 2013.07.16
申请号 US20100720321 申请日期 2010.03.09
申请人 NAKAMUTA KOJI;KOYAMA YOSHITO;FUJITSU LIMITED 发明人 NAKAMUTA KOJI;KOYAMA YOSHITO
分类号 H03M1/12 主分类号 H03M1/12
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