发明名称 |
Device scheme of HKMG gate-last process |
摘要 |
The present disclosure provides a method for making metal gate stacks of a semiconductor device. The method includes forming a high k dielectric material layer on a semiconductor substrate; forming a conductive material layer on the high k dielectric material layer; forming a dummy gate in a n-type field-effect transistor (nFET) region and a second dummy gate in a pFET region employing polysilicon; forming an inter-level dielectric (ILD) material on the semiconductor substrate; applying a first chemical mechanical polishing (CMP) process to the semiconductor substrate; removing the polysilicon from the first dummy gate, resulting in a first gate trench; forming a n-type metal to the first gate trench; applying a second CMP process to the semiconductor substrate; removing the polysilicon from the second dummy gate, resulting in a second gate trench; forming a p-type metal to the second gate trench; and applying a third CMP process to the semiconductor substrate.
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申请公布号 |
US8487382(B2) |
申请公布日期 |
2013.07.16 |
申请号 |
US201113292665 |
申请日期 |
2011.11.09 |
申请人 |
CHUNG SHENG-CHEN;THEI KONG-BENG;CHUANG HARRY;TAIWAN SEMICONDUCTOR MAUFACTURING COMPANY, LTD. |
发明人 |
CHUNG SHENG-CHEN;THEI KONG-BENG;CHUANG HARRY |
分类号 |
H01L21/70 |
主分类号 |
H01L21/70 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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