发明名称 Method and apparatus for reading a programmable anti-fuse element in a high-voltage integrated circuit
摘要 In a method for reading a programmable anti-fuse block of a high-voltage integrated circuit a first voltage is applied to a first pin of the HVIC, the first voltage being lowered to a second voltage at a first node. Current is shunted from the first node, thereby lowering the second voltage to a third voltage. An isolation circuit block is then activated to couple the third voltage to a common node of the programmable anti-fuse block, the common node being coupled to a plurality of anti-fuses, each anti-fuse having a programmed state. A read signal is generated that causes a voltage potential representative of the programmed state of each anti-fuse to be latched into a corresponding latch element.
申请公布号 US8487646(B2) 申请公布日期 2013.07.16
申请号 US201113066624 申请日期 2011.04.20
申请人 BANERJEE SUJIT;PHAM GIAO MINH;POWER INTEGRATIONS, INC. 发明人 BANERJEE SUJIT;PHAM GIAO MINH
分类号 G01R31/02 主分类号 G01R31/02
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