| 摘要 |
PURPOSE: A precharge circuit and a semiconductor memory device are provided to reduce the difference between data input and output speed by connecting input and output lines respectively connected to mats. CONSTITUTION: A first input and output line (SIO<1>) is connected to a first bit line of a first mat including multiple memory cells. A second input and output line (SIO<2>) is connected to a second bit line of a second mat including the multiple memory cells. A switching unit (7) connects the first input and output line and the second input and output line in response to a precharge signal. [Reference numerals] (1) Column selection signal generating unit; (2) Precharge signal generating unit; (3) First mat; (4) Second mat; (5) First equalizer; (6) Second equalizer; (7) Switching unit
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