发明名称 STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
摘要 PURPOSE: A semiconductor package and fabricating method thereof are provided to reduce processing time by reducing the depth of a through electrode. CONSTITUTION: A first through electrode (120) passes through a substrate. A first semiconductor chip (160) is located in a recess region. The first semiconductor chip is electrically connected to the first through electrode. A redistribution pattern layer (140) is located on the second surface of the substrate. The redistribution pattern layer is electrically connected to redistribute the first through electrode.
申请公布号 KR20130077034(A) 申请公布日期 2013.07.09
申请号 KR20110145521 申请日期 2011.12.29
申请人 NEPES CO., LTD. 发明人 PARK, BYUNG JIN
分类号 H01L23/48;H01L21/60 主分类号 H01L23/48
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