Memory control circuit and integrated circuit including branch instruction and detection and operation mode control of a memory

摘要

A memory control circuit includes a branch detection section to detect a branch instruction from an instruction fetched from a memory unit including a plurality of operation modes, and a mode control section to change an operation mode of the memory unit according to a detection result by the branch detection section. The memory unit includes a plurality of memories, the plurality of operation modes include a normal mode allowing access and a standby mode consuming a lower power than the normal mode, and in response to the detection of a branch instruction from an instruction fetched from any one of the plurality of memories, the mode control section makes standby release of the other memories.