METHODS AND APPARATUS FOR IMPLEMENTING PCI EXPRESS LIGHTWEIGHT NOTIFICATION PROTOCOLS IN A CPU/MEMORY COMPLEX

摘要

Methods and apparatus are provided for implementing a lightweight notification (LN) protocol in the PCI Express base specification which allows an endpoint function associated with a PCI Express device to register interest in one or more cachelines in host memory, and to request an LN notification message from the CPU/memory complex when the content of a registered cacheline changes. The LN notification message can be unicast to a single endpoint using ID-based routing, or broadcast to all devices on a given root port. The LN protocol may be implemented in the CPU complex by configuring a queue or other data structure in system memory for LN use. An endpoint registers a notification request by setting the LN bit in a "read" request of an LN configured cacheline.