发明名称 METHODS FOR INTEGRATION OF METAL/DIELECTRIC INTERCONNECTS
摘要 Described herein are methods for copper/low-k dielectric material integration. The methods involve depositing and curing a low-k dielectric material and depositing a mask on the low-k dielectric material. A via is patterned in the low-k dielectric material and a trench is patterned in the low-k dielectric material. After the via or trench is patterned, a portion of the low-k material is backfilled with a backfill material. The trench and via are filled with copper, then the mask and the copper filling the via are removed. After a first pre-CLN, the backfill material is removed. This creates a robust copper/porous low-k dielectric material interconnect.
申请公布号 US2013171819(A1) 申请公布日期 2013.07.04
申请号 US201113338486 申请日期 2011.12.28
申请人 MIYAJIMA HIDESHI;MASUDA HIDEAKI;TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 发明人 MIYAJIMA HIDESHI;MASUDA HIDEAKI
分类号 H01L21/768 主分类号 H01L21/768
代理机构 代理人
主权项
地址