发明名称 COMPLEMENTARY JUNCTION FIELD EFFECT TRANSISTOR DEVICE AND ITS GATE-LAST FABRICATION METHOD
摘要 The disclosure relates to a complementary junction field effect transistor (c-JFET) and its gate-last fabrication method. The method of fabricating a semiconductor device includes: forming a dummy gate on a first conductivity type wafer, forming sidewall spacers on opposite sides of the dummy gate, forming a source and a drain regions on the opposite sides of the dummy gate, removing the dummy gate, forming a first semiconductor region of a second conductivity type in an opening exposed through the removing the dummy gate, and forming a gate electrode in the opening.
申请公布号 US2013168741(A1) 申请公布日期 2013.07.04
申请号 US201213626634 申请日期 2012.09.25
申请人 (SHANGHAI) SEMICONDUCTOR MANUFACTURING INTERNATIONAL;INTERNATIONAL CORPORATION (BEIJING) SEMICONDUCTORMANUFACTURING;SEMICONDUCTOR MANUFACTURING INTERNATIONAL CORPORATION (BEIJING);SEMICONDUCTOR MANUFACTURING INTERNATIONAL CORPORATION (SHANGHAI) 发明人 FUMITAKE MIENO
分类号 H01L29/80;H01L21/337 主分类号 H01L29/80
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