| 摘要 |
PROBLEM TO BE SOLVED: To efficiently utilize an instruction held in an instruction buffer to improve instruction fetch performance.SOLUTION: An arithmetic processing unit has: an instruction buffer which holds an instruction acquired on the basis of an instruction fetch request; an instruction execution control part which decodes the instruction to be executed; a branch prediction mechanism which holds branch history including a travel flag showing a difference between a branch instruction address and a branch destination instruction address to perform branch prediction of the instruction; and an instruction fetch control part which issues the instruction fetch request. If a branch prediction result shows that a branch has been establishment, when it is determined that the branch destination instruction address is included in an address corresponding to N-time instruction fetch requests in the sequential direction issued until the branch prediction result is output on the basis of the travel flag, the control part does not issue the instruction fetch request to the branch destination instruction address, and makes the instruction execution control part output the instruction held in the instruction buffer on the basis of the instruction fetch request in the sequential direction. |
