HIGH FREQUENCY SIGNAL PROCESSING APPARATUS AND WIRELESS COMMUNICATION APPARATUS

摘要

Provided are a high frequency signal processing apparatus, which can achieve reduction of power consumption, and a wireless communication apparatus that is provided with the high frequency signal processing apparatus. For instance, in the case where an instructed power level (PWCS) with respect to a high frequency power amplifier (HPA) is a second reference value or higher, a power supply voltage control circuit (VDCTL) controls a high-speed DC-DC converter (DCDC) using detection results obtained from an envelope detection circuit (ADETC), and a bias control circuit (BSCTL) instructs a fixed bias value, thereby performing envelope tracking. In the case where the instructed power level is the second reference value to a first reference value, the power supply voltage control circuit (VDCTL) and the bias control circuit (BSCTL) respectively instruct a power supply voltage (VDD) and a bias value, which lower in proportion to lowering of the instructed power level, and when the instructed power level is lower than the first reference value, the circuits respectively instruct a fixed power supply voltage (VDD) and a fixed bias value.