发明名称 INFORMATION PROCESSING APPARATUS AND MEMORY ACCESS METHOD
摘要 PROBLEM TO BE SOLVED: To provide an information processing apparatus and a memory access method which can perform efficient memory access.SOLUTION: A plurality of CPUs 21 in an information processing system includes an address converting unit 35 that performs conversion between a logical address and a physical address. Each of the plurality of CPUs 21 includes a node map 34 that performs conversion between a logical address and CPUID for identifying the CPU 21 of each node. Each of the plurality of CPUs 21 transmits transfer data including the physical address converted from the logical address, and the CPUID converted from the physical address through crossbar switch XB2. Upon receiving the transfer data through the crossbar switch XB2, each of the plurality of CPUs 21 determines whether it is an access to a local area or a shared area of memory 22 to be accessed by the CPU 21, on the basis of the physical address included in the transfer data.
申请公布号 JP2013130976(A) 申请公布日期 2013.07.04
申请号 JP20110279022 申请日期 2011.12.20
申请人 FUJITSU LTD 发明人 KOINUMA HIDEYUKI;OKADA MASAYUKI;SUGIZAKI TAKESHI
分类号 G06F12/06;G06F12/08 主分类号 G06F12/06
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