发明名称 Operating method of charge trap flash memory device
摘要 An operation method of a charge trap flash memory device is provided to assure stability of an erase state by preventing opposite charges from being left in a charge trap layer in an erase state. According to an operation method of performing erase operation in a charge trap flash memory device having a charge trap layer, erase operation is performed by applying a composite pulse of a DC pulse and a DC perturbation pulse to the charge trap flash memory device. The composite pulse has the DC perturbation pulse following the DC pulse. The DC perturbation pulse has a DC level with an opposite polarity to the DC pulse. The amplitude of the DC level of the DC perturbation pulse is smaller than the DC pulse.
申请公布号 KR101281683(B1) 申请公布日期 2013.07.03
申请号 KR20070037166 申请日期 2007.04.16
申请人 发明人
分类号 G11C16/10;G11C16/14;G11C16/32 主分类号 G11C16/10
代理机构 代理人
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