Failure analysis method, apparatus, and program for semiconductor integrated circuit

摘要

A failure analysis method for a semiconductor integrated circuit includes deriving a coordinate in a device coordinate system in analysis data for abnormal signal data included in the analysis data of a semiconductor integrated circuit, deriving a correspondence between a coordinate in the device coordinate system and a coordinate in a design coordinate system in design data of the semiconductor integrated circuit for a plurality of reference points in the semiconductor integrated circuit, deriving a coordinate conversion formula between the device coordinate system and the design coordinate system, deriving a position error between a coordinate in the device coordinate system converted by the coordinate conversion formula and a coordinate in the design coordinate system, and extracting a circuit related to an abnormal signal in the design data based on coordinates of the abnormal signal in the device coordinate system using the coordinate conversion formula and the position error.