发明名称 |
Methods and circuits for asymmetric distribution of channel equalization between devices |
摘要 |
A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.
|
申请公布号 |
US8477835(B2) |
申请公布日期 |
2013.07.02 |
申请号 |
US201113103564 |
申请日期 |
2011.05.09 |
申请人 |
ZERBE JARED L.;ASSADERAGHI FARIBORZ;LEIBOWITZ BRIAN S.;LEE HAE-CHANG;REN JIHONG;LIN QI;RAMBUS INC. |
发明人 |
ZERBE JARED L.;ASSADERAGHI FARIBORZ;LEIBOWITZ BRIAN S.;LEE HAE-CHANG;REN JIHONG;LIN QI |
分类号 |
H03H7/30 |
主分类号 |
H03H7/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|