发明名称 Power management of components having clock processing circuits
摘要 A method and system for managing power consumption of a component that employs a clock processing circuit to produce a processed clock signal used by the component from a clock signal supplied to the clock processing circuit. A frequency of a clock signal supplied to the clock processing circuit is changed based on operating characteristics of a voltage regulator module (VRM) or power supply unit so as to maintain acceptable operating parameters of the power supply unit during a change in frequency of a clock signal.
申请公布号 US8479030(B2) 申请公布日期 2013.07.02
申请号 US201113294327 申请日期 2011.11.11
申请人 ALLEN DANIEL J.;ALTERA CORPORATION 发明人 ALLEN DANIEL J.
分类号 G06F1/00 主分类号 G06F1/00
代理机构 代理人
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