| 摘要 |
PURPOSE: A semiconductor memory device is provided to be able to minimize the cost of cell by laminating plural cascade-connected MRAM cells in the vertical direction. CONSTITUTION: Plural unit cells are laminated to plural layers. A bit line is formed to a vertical structure and shared by plural unit cells. Each unit cell includes switching elements (SW11-SW13, SW21-SW23) and magnetic tunnel junction (MTJ) cells (MTJ11-MTJ13, MTJ21-MTJ23). The switching elements include a source region, a drain region, and a channel region. The MTJ cells are formed in the upper part of the switching elements. [Reference numerals] (SW11) Channel |
