| 摘要 |
<p>PURPOSE: A semiconductor device and an operating method thereof are provided to be able to reduce the circuit area by using one delayed duplicate modeling unit in a locking operation section and an output enable production section. CONSTITUTION: A delayed locked loop (210) comprises a delayed duplicate modeling unit for producing a feedback clock signal in reflection of a modeled first delayed time to the DLL clock signal. The delayed locked loop produces a DLL clock signal in reflection of a second delayed time corresponding to the phase relationship of an external clock signal and the feedback clock signal to the external clock signal. An output enable control circuit (230) produces an output enable signal corresponding to the delayed time and the CAS latency information reflected in the delayed locked loop after the locking operation of the delayed locked loop. [Reference numerals] (211) Clock buffering unit; (212) Variable delay line for DLL; (213) Path multiplying unit; (214) Delayed duplicate modeling unit; (215) Path reverse-multiplying unit; (216) Phase detection unit; (217) Control signal generation unit; (220) Date output unit; (231) Reset control unit; (232) Variable delay line for OE; (233) Counting unit; (234) Output enable signal generation unit</p> |
