SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING THE SAME

摘要

PURPOSE: A semiconductor integrated circuit and a method of testing the same are provided to test latch capability of a latch circuit, thereby monitoring fault in the latch circuit. CONSTITUTION: A test signal generating unit (21) generates a test signal with sequentially changing driving force in response to a test code signal. A switching unit (213) outputs the test signal selectively in response to a clock signal. A latch unit (215) is configured to latch the test signal outputted from the switching unit. An input node of the latch unit is initially latched in a logical level opposite to a logical level of the test signal in response to an initialize signal.