发明名称 INTEGRATED CIRCUIT SYSTEM AND MEMORY SYSTEM
摘要 PURPOSE: A memory system is provided to increase yield by reducing the number of transmission lines transmitting data between memory chips. CONSTITUTION: A first memory chip (C1) includes an input-output unit. A second memory chip (C2) includes a first bank group including more than one banks and a second bank group including more than banks. A first transmission line transmits data inputted to the input-output unit to the first bank group or the second bank group. The first transmission line transmits data outputted from the first bank group or the second bank group to the input-output unit.
申请公布号 KR20130072044(A) 申请公布日期 2013.07.01
申请号 KR20110139589 申请日期 2011.12.21
申请人 SK HYNIX INC. 发明人 BYEON, SANG JIN;YUN, TAE SIK
分类号 G11C7/10 主分类号 G11C7/10
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