发明名称 |
THREE-DIMENSIONAL STACKED INTEGRATED CIRCUIT |
摘要 |
<p>PURPOSE: A three-dimensional stacked integrated circuit is provided to prevent damage of a package, by forming a plurality of penetration silicon vias at each edge of a plurality of semiconductor chips. CONSTITUTION: A plurality of semiconductor chips (110) is stacked on a base substrate (100). The semiconductor chips are conducted through a plurality of penetration silicon vias (210, 220). The penetration silicon vias are formed at each edge of the semiconductor chips. The penetration silicon vias are electrically connected to a conductive pattern. The conductive pattern is formed on the upper surface of the base substrate.</p> |
申请公布号 |
KR20130070728(A) |
申请公布日期 |
2013.06.28 |
申请号 |
KR20110137887 |
申请日期 |
2011.12.20 |
申请人 |
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY |
发明人 |
KIM, JOUNG HO;SONG, EUN SEOK |
分类号 |
H01L23/48;H01L23/12 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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