| 摘要 |
A plurality of sensor circuits each including an optical sensor and a charge retention transistor each provided between a reset line and an accumulation node are arranged in a pixel region of a display device. In a sensing period, a LOW-level voltage is applied as a reset cancellation voltage to the reset line RSTa, and a HIGH-level voltage is applied to a control line CLKa to control the charge retention transistor to be in an ON state. In a period other than the sensing period, the LOW-level voltage is applied to the control line CLKa to control the charge retention transistor to be in an OFF state, and the HIGH-level voltage is applied as a retention voltage to the reset line RSTa. Thus, a drain-source voltage Vds of the charge retention transistor is lowered, a leakage current through the charge retention transistor is reduced, and a light detection accuracy is enhanced. A substantially middle voltage between a reset voltage and a voltage at an accumulation node at the sensing of a maximum amount of light may be used as the retention voltage.
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