| 摘要 |
<p>Provided is a CMOS SGT which uses a gate-last process and is produced by: forming a first and a second fin-shaped silicon layer on a substrate; forming a first insulating film around the first and second fin-shaped silicon layers; forming a first and a second columnar silicon layer in the upper sections of the first and second fin-shaped silicon layers; forming an n-type diffusion layer by injecting impurities into the upper section of the first columnar silicon layer, the upper section of the first fin-shaped silicon layer, and the lower section of the first columnar silicon layer; forming a p-type diffusion layer by injecting impurities into the upper section of the second columnar silicon layer, the upper section of the second fin-shaped silicon layer, and the lower section of the second columnar silicon layer; creating a gate-insulating film and a first and a second polysilicon gate electrode; forming a silicide in the upper sections of the diffusion layers of the upper sections of the first and second fin-shaped silicon layers; depositing an interlayer insulating film; exposing the first and second polysilicon gate electrodes; depositing a metal after etching the first and second polysilicon gate electrodes; and forming a first and a second metal gate electrode.</p> |
