发明名称 SEMICONDUCTOR PACKAGE, PACKAGING SUBSTRATE AND FABRICATION METHOD THEREOF
摘要 A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.
申请公布号 US2013161837(A1) 申请公布日期 2013.06.27
申请号 US201213490810 申请日期 2012.06.07
申请人 CHEN CHIA-YIN;LIU YU-CHING;CHANG YUEH-CHIUNG;WANG YU-PO;SILICONWARE PRECISION INDUSTRIES CO., LTD. 发明人 CHEN CHIA-YIN;LIU YU-CHING;CHANG YUEH-CHIUNG;WANG YU-PO
分类号 H01L23/48;H01L21/50 主分类号 H01L23/48
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