发明名称 NON-LINEAR TERMINATION FOR AN ON-PACKAGE INPUT/OUTPUT ARCHITECTURE
摘要 An on-package interface. A first set of single-ended transmitter circuits on a first die. A first set of single-ended receiver circuits on a second die. The receiver circuits have a termination circuit comprising an inverter and a resistive feedback element. A plurality of conductive lines couple the first set of transmitter circuits and the first set of receiver circuits. The lengths of the plurality of conductive lines are matched.
申请公布号 WO2013095567(A1) 申请公布日期 2013.06.27
申请号 WO2011US67019 申请日期 2011.12.22
申请人 INTEL CORPORATION;MELLINGER, TODD W.;GRIFFITH, MICHAEL E.;BALAMURUGAN, GANESH;THOMAS, THOMAS P.;KUMAR, RAJESH 发明人 MELLINGER, TODD W.;GRIFFITH, MICHAEL E.;BALAMURUGAN, GANESH;THOMAS, THOMAS P.;KUMAR, RAJESH
分类号 G06F1/00;G06F13/14 主分类号 G06F1/00
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